www.littelfuse.com ?2008 littelfuse speci?cations are subject to change without notice. 8 electronics designers guide silicon protection arrays bi-directinal esd protection array SP1002 lead-free/green series description back-to-back zener diodes fabricated in a proprietary silicon avalanche technology protect each i/o pin to provide a high level of protection for electronic equipment that may experience destructive electrostatic discharges (esd). these robust diodes can safely absorb repetitive esd strikes at the maximum level speci?ed in the iec 61000- 4-2 international standard ( level 4, 8kv contact discharge) without performance degradation. their very low loading capacitance also makes them ideal for protecting high- speed signal pins. pinout functional block diagram SP1002 lead-free/green series rohs pb green features t - p x d b q b d j u b o d f p g q ' (typ) i/o to i/o t & 4 % q s p u f d u j p o p g l 7 d p o u b d u e j t d i b s h f
l 7 air discharge, ( level 4, iec61000-4-2) t & ' 5 q s p u f d u j p o
iec61000-4-4, 40a o t
t - p x m f b l b h f d v s s f o u p g ? " . " 9
b u 7 t 4 n b m m q b d l b h f t b w f t board space applications t $ p n q v u f s 1 f s j q i f s b m t t . p c j m f 1 i p o f t t % j h j u b m $ b n f s b t t % f t l u p q t / p u f c p p l t t - $ % 1 % 1 5 7 t t 4 f u 5 p q # p y f t t % 7 % 1 m b z f s t t . 1 1 . 1 1 2 nc SP1002-01 (sc70-3) SP1002-01
9 www.littelfuse.com ?2008 littelfuse speci?cations are subject to change without notice. electronics designers guide silicon protection arrays bi-directinal esd protection array SP1002 lead-free/green series electrical characteristics (t op = 25c) parameter symbol test conditions min typ max units v p o r d e g a t l o v d i r =10ma 6.0 7.0 v standoff voltage v i r 6.0 v i t n e r r u c e g a k a e l leak v r a clamp voltage 1 v c i pp =1a, t p v 2 . 9 i pp =2a, t p v 2 . 1 1 esd withstand voltage v esd v k 8 ) t c a t n o c ( 2 - 4 - 0 0 0 1 6 c e i iec61000-4-2 (air) kv diode capacitance 1 c d 6 v 0 = s a i b e s r e v e r 1 parameter is guaranteed by device characterization 2 a minimum of 1,000 esd pulses are applied at 1s intervals application example thermal information s t i n u g n i t a r r e t e m a r a p storage temperature range c c c scart multimedia application of SP1002-01 2 x SP1002-01 multimedia device audio out l audio out r multimedia device audio in l audio in r absolute maximum ratings s t i n u e u l a v r e t e m a r a p l o b m y s i p peak current (t p 2a t op operating temperature c t stor storage temperature c caution: stresses above those listed in absolute maximum ratings may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speci?cation is not impli ed.
www.littelfuse.com ?2008 littelfuse speci?cations are subject to change without notice. 10 electronics designers guide silicon protection arrays bi-directinal esd protection array SP1002 lead-free/green series re?ow condition 1 c o ' s f f b t t f n c m z pre heat - temperature min (t s(min) ) ? $ - temperature max (t s(max) ) 200c - time (min to max) (t s ) 60 C 180 secs average ramp up rate (liquidus) temp (t l ) to peak ? $ t f d p o e n b y t s(max) to t l - ramp-up rate ? $ t f d p o e n b y re?ow - temperature (t l ) (liquidus) 217c - temperature (t l ) o t f d p o e t peak temperature (t p ) c time within 5c of actual peak temperature (t p ) 20 C 40 seconds ramp-down rate 6c/second max time 25c to peak temperature (t p ) 8 minutes max. do not exceed 260c soldering parameters part numbering system ordering information part number package marking min. order qty. 4 1 + 5 ( 4 $ # 9 part marking system sp xxxx xx x t g silicon protection array series number of channels package t= tape & reel g= green xxx xxx product series assembly site number of channels product characteristics lead plating . b u u f 5 j o lead material copper alloy lead coplanarity 0.0004 inches (0.102mm) subsitute material silicon body material . p m e f e & q p y z flammability ul94-v-0 / p u f t 1. all dimensions are in millimeters 2. dimensions include solder plating. % j n f o t j p o t b s f f y d m v t j w f p g n p m e n b t i n f u b m c v s s " m m t q f d j m d b u j p o t d p n q m z u p + & % & $ 4 1 & $ . 0 * t t v f " # m p j t g b d j o h v q g p s n p m e b o e g b d j o h e p x o g p s u s j n g p s n
j f s f w f s t f u s j n g p s n 1 b d l b h f t v s g b d f n b u u f m o j t i 7 % *
11 www.littelfuse.com ?2008 littelfuse speci?cations are subject to change without notice. electronics designers guide silicon protection arrays bi-directinal esd protection array SP1002 lead-free/green series package dimensions b 3 e he 2 1 e e d a2 a a1 c l 1.30 [0.0 5 12] 0.6 5 [0.02 5 6] 0.70 [0.0276] 1.90 [0.0748] 0.90 [0.03 5 4] package sc70-3 pins 3 jedec mo-203 issue a millimeters inches min max min max a 0.80 1.10 a1 0.00 0.10 0.000 0.004 a2 0.70 1.00 0.028 b 0.006 0.012 c 0.08 0.010 d 0.089 e e 0.66 bsc 0.026 bsc he 2.00 2.40 0.079 0.094 l 0.26 0.46 0.010 0.018 embossed carrier tape & reel speci?cation - sc70-3 symbol millimetres inches min max min max e ' p2 0.077 0.081 d 1.40 1.60 d1 1.00 0.049 p0 4.10 0.161 10p0 40.0 +/- 0.20 w 7.70 8.10 p 4.10 0.161 a0 0.090 0.098 a1 1.00 ref 3 f g b0 0.090 0.098 b1 1.90 ref 0.074 k0 1.10 k1 0.60 ref 3 f g t 0.27 max 0.010 dimensions po p2 ?d1 ?d ao a1 p ko f e w bo b1 t k1 solder pad layout
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